Via, AR 1:6
Via, AR 1:8
Via, AR 1:9
Blind via, AR 1:1
Blind via, AR 1.5:1
In general you can say: the lower
the aspect ratio, the better the
reliability of the board.
Military applications are exemplary,
an aspect ratio of max. 1:6 for vias
and 1.5:1 for blind vias is
recommended here.
For all the other kind of boards we recommend an aspect ratio of max. 1:9
for vias and 1:1 for blind vias.
Use of non functional pads
picture 2
photo 3
photo 4
Many PCB manufacturers recommend removing of non functional pads from the inner layers.
Advantage: saving of time for AOI data generating, short AOI test periods,
less pseudo errors, and longer drill (bit) life. (See picture 2, left side, and photo 3)
In contrast to this the
Hans Brockstedt GmbH
strongly recommends
placing a pad in each inner layer
to increase the reliability of the board
(even in the clearance areas of GND/VCC) to achieve extra stabilisation of the plated
barrels. This step reduces the risk of barrel cracks. (See picture 2, right side, and photo 4)
The advantages of adhesiveless laminates combined with window technology
picture 5
photo 6
Construction with adhesiveless laminates combined with window technology
Picture 5 and photo 6 show a construction with adhesiveless flexible laminates and the use
of window technology. The construction with
adhesiveless laminates is not enough to increase the reliability of a board. In addition the window technology
should be used. This means that the cover foil is only partial laminated on the
flexible area. The foil should project at least 1 mm into the rigid part of the PCB.
The window technology allows constructions, which are free of acrylic adhesive layers in
the rigid part of the multilayer and avoids by this the problem of the high CTE of the
acrylic adhesive in the z-axis.
picture 7
photo 8
Construction with acrylic adhesive laminates
As shown in picture 7 and photo 8 this construction contains eight 25 µm acrylic
adhesive layers (shown in green). The adhesive layers are also inside the rigid part
where you usually find the through-hole plating as well. Due to the high CTE of the
acrylic adhesive in the z-axis the construction of the circuit is poor.